UC1608XFAC 查看數據表（PDF） - Unspecified
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UC1608XFAC Datasheet PDF : 42 Pages
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UC1608
128x240 Matrix LCD Controller-Drivers
CONTROL REGISTERS
UC1608 contains registers which control the chip operation. These registers can be modified by commands.
The following table is a summary of the control registers, their meaning and their default value. The
commands supported by UC1608 are described in the next two sections, first a summary table, followed by
a detailed description.
Name:
Default:
The Symbolic reference of the register byte.
Note that, some symbol names refer to collection of bits (flags) within one register byte.
Numbers shown in Bold fonts are values after Power-Up-Reset and System-Reset..
Name Bits
SL
6
CR
8
CA
8
PA
4
BR
2
TC
2
GN
2
PM
6
MR
1
OM
2
BZ
1
RS
1
PC
3
APC0 8
Default
0H
0H
0H
0H
2H
0H
3H
0H
1H
–
–
–
7H
2CH
Description
Start Line. Mapping from COM1 to Display Data RAM.
Return Column Address. Useful for cursor implementation.
Display Data RAM Column Address
(Used in Host to Display Data RAM access)
Display Data RAM Page Address
(Used in Host to Display Data RAM access)
Bias Ratio. The ratio between VLCD and VBIAS.
00b= 10.7
01b= 11.3
10b=12.0
11b= 12.7
Temperature Compensation (per oC).
00b: 0.0%
01b: -0.05%
10b: -0.1%
11b: -0.2%
Gain, coarse setting of VBIAS and VLCD
Electronic Potentiometer to fine tune VBIAS and VLCD
Multiplexing Rate: Number of pixel rows:
0b: 96
1b: 128
Operating Modes (Read Only)
10b: Sleep
11b: Normal
01b: (Not used)
00b: Reset
Busy with internal processes (reset, changing mode, etc.)
OK for Display RAM read/write access.
Reset in progress, Host Interface not ready
Power Control and panel loading.
PC[0]: 0b: LCD: <20nF
1b: LCD: >20nF
PC[2:1]: 00b: External VLCD
11b: Internal VLCD
01b and 10b are reserved, for UltraChip only. Please do not use.
Advanced Product Configuration. For UltraChip only. Please do not use.
(Revision 0.52 Preview)
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