UC1608XFAC 查看數據表（PDF） - Unspecified
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UC1608XFAC Datasheet PDF : 42 Pages
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ULTRACHIP
High-Voltage Mixed-Signal IC
©1999-2002
PIN DESCRIPTION
Name Type
Pins
VDD
VDD2
VDD3
PWR
VSS
VSS2
GND
VB3+ VB3–
VB2+ VB2–
VB1+ VB1–
VB0+ VB0–
PWR
SB3+ SB3–
SB2+ SB2–
SB1+ SB1–
I
SB0+ SB0–
VLCD-IN
VLCD-OUT
PWR
Description
MAIN POWER SUPPLY
VDD2/VDD3 is the analog VDD and it should be connected to the same
power source. VDD is the digital VDD and is connected to a voltage
source that is the same, or lower than VDD2/VDD3.
VDD supplies for digital logic and display data RAM.
VDD2 supplies for VLCD and VBIAS generator, VDD3 supplies for other
analog circuits.
Minimize the trace resistance for VDD and VDD2.
Ground. Connect VSS and VSS2 to the shared GND pin.
Minimize the trace resistance for VSS and VSS2.
LCD POWER SUPPLY
LCD Bias Voltages. These are the voltage source to provide SEG
driving currents. These voltages are generated internally. Connect
capacitors of CBX value between VBX+ and VBX–.
The resistance of these four traces directly affects the SEG driving
strength of the resulting LCD module. Minimize the trace resistance is
critical in achieving high quality image.
The sensor pins for CBX capacitors. Please connect these sensor pins
as closely to proper CBX pads as possible. These signals can tolerate
input resistance of up to 2K Ohm, so, narrow COF traces can be used.
However, the noise on these pins affects the accuracy of SEG driving
voltage level. To minimize noise caused by VBX-CBX charging current,
the trace resistance shared between VBX+/- and SBX+/- should be
minimized.
Main LCD Power Supply. Connect these pins together.
A by-pass capacitor CL is optional. When CL is used, connect CL
between VLCD and VSS, and keep the trace resistance under 300 Ohm.
NOTE
• Recommended capacitor values:
CB: ~100x LCD load capacitance or 1.5uF (2V), whichever is higher.
CL: 10nF ~ 50nF (16V) is appropriate for most applications.
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Revision 0.52
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