CS62LS4008FC 查看數據表（PDF） - Unspecified
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CS62LS4008FC Datasheet PDF : 11 Pages
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Low Power CMOS SRAM
512K X 8 Bits
UC62LS4008
-20/-25
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
VCC/0V
1V/ns
0.5VCC
AC TEST LOADS AND WAVEFORMS
INCLUDING
JIG AND
SCOPE
3.3V
INCLUDING
JIG AND
SCOPE
3.3V
OUTPUT
OUTPUT
FIGURE 1A
FIGURE 1B
TERMINAL EQUIVALENT
667Ω
OUTPUT
1.73V
KEY TO SWITCHING WAVEFORMS
WAVEFORMS
INPUTS
OUTPUTS
MUST BE
STEADY
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
DON’T CARE
ANY CHANGE
PERMITTED
DOES NOT
APPLY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE
STATE
UNKNOWN
CENTER LINE
IS HIGH
IMPEDANCE
OFF STATE
VCC
GND
ALL INPUT PULSES
10%
90% 90%
10%
FIGURE 2 1V/ns
1V/ns
AC ELECTRICAL CHARACTERISTICS (TA=0℃ to 70℃, VCC=3.0V~3.6V)
READ CYCLE
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
UC62LS4008-20 UC62LS4008-25
Min Typ Max Min Typ Max
tAVAX
tRC
Read Cycle Time
20 -
-
25
-
-
tAVQV
tAA
Address Access Time
-
-
20
-
-
25
tELQV
tCE
Chip Select Access Time
-
-
20
-
-
25
tGLQV
tOE
Output Enable to Output Valid
-
-
10
-
-
10
tELQX
tCLZ
Chip Select to Output Low Z
5
-
-
5
-
-
tGLQX
tOLZ
Output Enable to Output Low Z
3
-
-
3
-
-
tEHQZ
tCHZ
Chip Deselect to Output in High Z
0
-
10
0
-
10
tGHQZ
tOHZ
Output Disable to Output in High Z
0
-
10
0
-
10
tAXOX
tOH
Address Chang to Output Change
5
-
-
5
-
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
U-Chip Technology Corp. LTD. .
Reserves the right to modify document contents without notice.
Preliminary Rev.1.0
PAGE 4
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