UC62LS1008CA-20 查看數據表（PDF） - Unspecified
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UC62LS1008CA-20 Datasheet PDF : 11 Pages
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Low Power CMOS SRAM
128K X 8 Bits
UC62LS1008
-20/-25
Features:
• Vcc operation voltage : 3.0V~ 3.6V
• Low power consumption :
20mA (Max.) operating current
1uA (Typ.) CMOS standby current
• High Speed Access time :
25ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Data retention supply voltage as low as 1.2V
• Easy expansion with CE\ and OE\ options
Description
The UC62LS1008 is a high performance, very low power
CMOS Static Random Access Memory organized as 131,072
words by 8 bits and operates from 3.0V to 3.6V supply
voltage. Advanced CMOS technology and circuit techniques
provide both high speed and low power features with a
typical CMOS standby current of 1uA and maximum access
time of 25ns in 3.0V operation.
Easy memory expansion is provided enable (CE\), and
active LOW output enable (OE\) and three-state output
drivers.
The UC62LS1008 has an automatic power down feature,
reducing the power consumption significantly when chip is
deselected.
The UC62LS1008 is available in the JEDEC standard 32 pin
450mil Plastic SOP, 8mmx20.0mm TSOP (type I), and
8mmx13.4mm STSOP.
PRODUCT FAMILY
Product Family
Operating
Tempature
UC62LS1008HC
UC62LS1008FC
UC62LS1008GC
UC62LS1008AC
UC62LS1008HI
UC62LS1008FI
UC62LS1008GI
UC62LS1008AI
0℃ ~ 70℃
-40℃ ~ 85℃
Vcc Range
3.0V ~ 3.6V
3.0V ~ 3.6V
Speed
(ns)
Vcc=3V(Max.)
20/25
20/25
Power Consumption
STANDBY
Operating
Vcc=3.3V(Typ.) Vcc=3.6V(Max.)
1uA
20mA
1uA
20mA
Package
Type
TSOP-32
SOP-32
STSOP-32
DICE
TSOP-32
SOP-32
STSOP-32
DICE
PIN CONFIGURATIONS
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
9 UC62LS1008FI 24
10 UC62LS1008FC 23
11
22
12
21
13
20
14
19
15
18
16
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
A11
1
A9
2
A8
3
A13
4
WE
5
CE2
A15
6
7
UC62LS1008HI
VCC
8
UC62LS1008HC
NC
9
UC62LS1008GI
A16
10
UC62LS1008GC
A14
11
A12
12
A7
13
A6
14
A5
15
A4
16
32
OE
31
A10
30
CE
29
DQ7
28
DQ6
27
DQ5
26
DQ4
25
DQ3
24
GND
23
DQ2
22
DQ1
21
DQ0
20
A0
19
A1
18
A2
17
A3
BLOCK DIAGRAM
CE2
CE
WE
OE
ROW
Address
COL
Address
CE
WE
OE
MEMORY ARRAY
128K X 8 Bits
COLUMN DECODER
SENSE AMPLIFIER
&
WRITE DRIVER
X8
I/O BUFFER
U-Chip Technology Corp. LTD.
Reserves the right to modify document contents without notice.
Preliminary Rev. 1.0
PAGE 1
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