ADM101E(1999) 查看數據表（PDF） - Analog Devices
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ADM101E Datasheet PDF : 6 Pages
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PIN FUNCTION DESCRIPTION
Pin
No. Mnemonic Function
1 GND
2 C1–
3 V–
4
TIN
5
ROUT
6
RIN
7
TOUT
8 SD
9 C1+
10 VCC
Ground Pin. Must be connected to 0 V.
Negative Terminal of C1 (if C1 is Polarized
Capacitor).
Internally Generated Negative Supply Voltage.
Driver Input (3 V to 5 V TTL/CMOS
Logic Levels).
Receiver Output (3 V to 5 V TTL/CMOS
Logic Levels).
Receiver Input (EIA-232 Signal Levels).
Driver Output (EIA-232 Signal Levels).
Shutdown Input. Logic 1 on this input puts
the ADM101E into low power shutdown mode.
Positive Terminal of Charge Pump Capacitor
(if C1 is Polarized Capacitor).
Positive Power Supply, Nominally +5 V.
Typical Performance Characteristics
0
–1
–2
–3
–4
–5
–6
0
5
10
15
20
25
CURRENT – mA
Figure 1. Charge Pump Voltage vs. Current
ADM101E
PIN CONFIGURATION
GND 1
10 VCC
C1– 2
V– 3
TIN 4
ADM101E
TOP VIEW
(Not to Scale)
9 C1+
8 SD
7 TOUT
ROUT 5
6 RIN
14
12
10
8
6
4
2
0
0
500 1000 1500 2000 2500 3000 3500
LOAD CAPACITANCE – pF
Figure 2. IDD vs. Load Capacitance @ 460 kbps
REV. 0
–3–
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