SPT104AI 查看數據表（PDF） - Signal Processing Technologies

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SPT104AI

DC TO 1.1GHz LINEAR AMPLIFIER

Signal Processing Technologies 

the signal frequency increases beyond f45, the op amp loses

influence and the SPT104 gain and output impedance domi-

nate. To ensure a smooth transition and matched gain at all

frequencies, adjust Rb for a minimum op amp output swing

with a 0.1VPP sinewave input (to the SPT104) at the fre-

quency f45. Since the SPT104 has a 50Ω output impedance,

its output voltage is a function of the load impedance

(Av ~ 10RL/(RL + 50)), whereas the gain of the composite

amplifier at low frequencies and DC is relatively indepen-

dent of the load impedance, due to the high open-loop gain

of the op amp. Thus, to avoid gain mismatching and phase

non-linearity, use the composite amplifier only if the load

impedance is constant from DC to at least 10(f45).

Use of a composite amplifier reduces input offset voltage

and its corresponding drift, but has no effect on input bias

current. This current is converted to an input voltage by the

resistance to ground seen at the amplifier input and the volt-

age appears, amplified, at the output. Typical input offset

voltage due to the bias current is 2mV and input offset drift is

approximately 15mV/°C.

Thermal Considerations

The SPT104 case must be maintained at or below 140°C.

Note that because of the amplifier design, power dissipation

remains fairly constant, independent of the load or drive

level. Therefore, standard derating is not possible. There

are two ways to keep the case temperature low. The first is

to keep the amount of power dissipated inside the package

to a minimum and the second is to get the heat out of the

package quickly by reducing the thermal resistance from

case to ambient.

A large portion of the heat dissipated inside the package is

in the voltage regulators. At the minimum +9V supply level

the regulators dissipate 390mW and at the maximum ±16V

supply level they dissipate 1.2W.

The amplifier itself dissipates a fairly constant 600mW

(55mA x 10.8V). Reducing the power dissipation of the in-

ternal regulators will go far towards reducing the internal

junction temperatures without impacting the performance.

Reducing either the input supply voltages (on pins 1 and 2)

and/or shunting the regulator current through external resis-

tors (from pins 1 to 14 and pins 2 to 13) are both effective

means towards significantly reducing the internal power dis-

sipation. A minimum voltage across the regulator of 3.6V

and a minimum regulator current of 10mA will satisfy the

regulator dropout voltage and current limits.

Given the maximum anticipated power supply voltages, the

shunt resistor should be calculated to yield a 35mA current

from that voltage to the regulated voltage of 5.4V. This will

leave 10mA through the regulator at the minimum quiescent

current of 45mA. The regulator input voltages may be re-

duced directly by dropping the voltage supplies, or, if that

option is not available, using either a zener or resistive drop-

ping element in series with the supply. If a series dropping

element is used, the decoupling capacitors must appear on

pins 1 and 2 of the SPT104. Figure 3 shows two possible

power reduction circuits from fixed ±15V supplies.

Several methods of decreasing the thermal resistance from

case to ambient are possible. With no heat paths other than

still air at 25°C, the thermal resistance from case to ambient

for the SPT104 is about 40°C/W. When placed in a printed

circuit board with all ground pins soldered into a ground

plane 1" X 1.5", the thermal resistance drops to about

30°C/W. In this configuration, the case rise will be 30°C for

9V supplies and 50°C for 16V supplies. This results in maxi-

mum allowable ambient temperatures of 110°C and 90°C,

respectively. If higher operating temperatures are required,

heat sinking of the package is recommended.

Figure 3: Reducing Power Dissipation

Package Dimensions

SPT

5

SPT104

9/30/99

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