UPC4092G2 查看數據表（PDF） - NEC => Renesas Technology
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UPC4092G2 Datasheet PDF : 10 Pages
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µPC4092
ELECTRICAL CHARACTERISTICS (TA = 25 °C, V± = ±15 V)
Parameter
Input Offset Voltage
Input Offset CurrentNote 7
Input Bias CurrentNote 7
Large Signal Voltage Gain
Supply CurrentNote 8
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Output Voltage Swing
Common Model Input Voltage Range
Slew Rate
Unity Gain Frequency
Input Equivalent Noise Voltage Density
Channel Separation
Input Offset Voltage
Average VIO Temperature Drift
Input Offset CurrentNote 7
Input Bias CurrentNote 7
Symbol
VIO
IIO
IB
AV
ICC
CMR
SVR
Vom
Conditions
RS ≤ 50 Ω
RL ≥ 2 kΩ , VO = ±10 V
IO = 0 A
RL ≥ 10 kΩ
RL ≥ 2 kΩ
VICM
SR
AV = 1
funity
en
RS = 100 Ω, f = 1 kHz
VIO
∆VIO/∆T
IIO
IB
RS ≤ 50 Ω, TA = –20 to +70 °C
TA = –20 to +70 °C
TA = –20 to +70 °C
TA = –20 to +70 °C
MIN.
25000
70
70
±12
±10
±11
TYP.
±1
±25
50
200000
5
100
100
+14.0
–13.3
+13.5
–12.8
+14
–12
15
4
19
120
±7
MAX.
±3
±100
200
6.8
±5
±2
7
Unit
mV
pA
pA
mA
dB
dB
V
V
V
V/µs
MHz
nV/√Hz
dB
mV
µV/°C
nA
nA
Notes 7. Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input
stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain
the junction temperature close to the operating ambient temperature.
8. This current flows irrespective of the existence of use.
Data Sheet G13905EJ2V0DS
3
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