UPD75237GJ-XXX-5BG 查看數據表（PDF） - NEC => Renesas Technology
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UPD75237GJ-XXX-5BG Datasheet PDF : 191 Pages
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µPD75237
Fig. 2-1 Date Memory Configuration and Addressing Range in Each Addressing Mode
000H
01FH
020H
07FH
0FFH
100H
19FH
1A0H
1FFH
200H
Addressing Mode
Memory Bank
Enable Flag
General
Register
Area
Data Area
Static RAM
(Memory Bank
0)
mem
mem. bit
MBE
=0
MBE
=1
MBS
=0
Data Area
Static RAM
(Memory Bank
1)
Display Data
Memory Area
Stack Area
Data Area
Static RAM
(Memory Bank
2)
MBS
=1
MBS
=2
@HL
@H+mem. bit
MBE
=0
MBE
=1
MBS
=0
MBS
=1
MBS
=2
@DE
@DL
Stack
pmem.
Address- fmem. bit
ing
@L
—
—
—
—
SBS
=0
SBS
=1
SBS
=2
2FFH
300H
Data Area
Static RAM
(Memory Bank
3)
3FFH
MBS
MBS
SBS
=3
=3
=3
Not Incorporated
F80H
FC0H
Peripheral Hardware Area
(Memory Bank 15)
MBS
= 15
MBS
= 15
FFFH
Remarks — : Don’t care
17
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