UPD75238GJ 查看數據表（PDF） - NEC => Renesas Technology

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UPD75238GJ

4 BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75238

Table 2-4 µPD75238 I/O Map (2/4)

Address

Hardware name (symbol)

b3

b2

b1

b0

R/W

Number of ma- Bit manipu-

nipulatable bits lation ad-

1 bit 4 bits 8 bits dressing

Remarks

FB0H

IST1

IST0

MBE

RBE

R/W

fmem.bit

Program status word (PSW)

5

FB2H Interrupt priority select register (IPS)

––

W

–

FB3H

FB4H

FB5H

Processor clock control register (PCC)

INT0 mode register (IM0)

INT1 mode register (IM1)

W

W

–

–

W

–

Bit 2 is always set to

0.

Bits 1, 2, and 3 are

always set to 0.

5

FB7H System clock control register (SCC)

W

FB8H

IE4

IRQ4

IEBT

IRQBT

R/W

––

Only bits 0 and 3

allow bit manipula-

tion.

– fmem.bit

FB9H

EOT

R/W

FBAH

IEW

IRQW

R/W

–

FBBH

IEKS

IRQKS

IETPG IRQTPG R/W

FBCH

IRQT1

IET0

IRQT0

R/W

–

FBDH

IECSI0 IRQCSI0 R/W

FBEH

IE1

IRQ1

IE0

IRQ0

R/W

–

FBFH

IE2

IRQ2

R/W

FC0H Bit sequential buffer 0 (BSB0)

R/W

FC1H Bit sequential buffer 1 (BSB1)

R/W

FC2H Bit sequential buffer 2 (BSB2)

R/W

FC3H Bit sequential buffer 3 (BSB3)

R/W

FC8H

5

FC9H

CSIE1

CSIM11 CSIM10

W

––

W

–

FCCH Serial I/O shift register 1 (SIO1)

R/W – –

24

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