UPD75238GJ 查看數據表（PDF） - NEC => Renesas Technology
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UPD75238GJ Datasheet PDF : 190 Pages
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µPD75238
Fig. 3-2 Program Memory Map
0000H MBE RBE Internal reset start address (high-order 6 bits)
Internal reset start address (low-order 8 bits)
0002H MBE RBE INTBT/INT4 start address (high-order 6 bits)
INTBT/INT4 start address (low-order 8 bits)
0004H MBE RBE INT0 start address
(high-order 6 bits)
INT0 start address
(low-order 8 bits)
0006H MBE RBE INT1 start address
(high-order 6 bits)
INT1 start address
(low-order 8 bits)
0008H MBE RBE INTSO start address
(high-order 6 bits)
INTSO start address
(low-order 8 bits)
000AH MBE RBE INTT0 start address
(high-order 6 bits)
INTT0 start address
(low-order 8 bits)
000CH MBE RBE INTTPG start address
(high-order 6 bits)
INTTPG start address
(low-order 8 bits)
000EH MBE RBE INTKS start address
(high-order 6 bits)
INTKS start address
(low-order 8 bits)
CALLF !faddr
instruction
entry address
BRCB !caddr
instruction
branch address
BR !addr
instruction
branch address
0020H
007FH
0080H
07FFH
0800H
GETI instruction reference table
CALL !addr
instruction
branch address
Branch/call
address specified
in GETI instruction
BRA !addr
instruction
branch address
CALLA !addr
instruction
branch address
BR $addr1 instruction
relative branch
address (–15 to –1,
+2 to +16)
0FFFH
1000H
1FFFH
2000H
2FFFH
3000H
3FFFH
4000H
4FFFH
5000H
5FFFH
6000H
6FFFH
7000H
7F7FH
BRCB !caddr
instruction
branch address
BRCB !caddr
instruction
branch address
BRCB !caddr
instruction
branch address
BRCB !caddr
instruction
branch address
BRCB !caddr
instruction
branch address
BRCB !caddr
instruction
branch address
BRCB !caddr
instruction
branch address
Caution The start address of an interrupt vector shown above consists of 14 bits. So, the start address
must be set within a 16K-byte space (0000H to 3FFFH).
Remark In addition to the above, the BR PCDE and BR PCXA instructions can cause a branch to an address
with only the low-order 8 bits of the PC changed.
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