UPD77113A 查看數據表（PDF） - NEC => Renesas Technology
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UPD77113A Datasheet PDF : 62 Pages
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µPD77113A, 77114
1. PIN FUNCTION
Because the pin numbers differ depending on the package, refer to the diagram of the package to be used.
1.1 Pin Function Description
• Power supply
Pin Name
IVDD
EVDD
GND
Pin No.
100-pin TQFP 80-pin BGA
35, 77, 85
B5, B7, G5
25, 50, 64, 75,
100
A3, C9, D1, D9,
G1, J7
1, 26, 36, 51,
65, 76, 78, 86
A5, A7, C1, D6,
E2, E7, F4, G2,
G9
I/O
Function
−
Power to DSP core (+2.5 V)
−
Power to I/O pins (+3 V)
−
Ground
Shared by:
−
−
−
Remark Please supply voltage to the IVDD and EVDD pins simultaneously.
• System control
Pin Name
CLKIN
CLKOUT
RESET
WAKEUP
Pin No.
100-pin TQFP 80-pin BGA
74
C7
73
B9
87
C4
88
B4
I/O
Function
Shared by:
Input
Output
Input
Input
System clock input
Internal system clock output
Internal system reset signal input
Stop mode release signal input.
• When this pin is asserted active, the stop
mode is released. The function of this pin
can be activated or deactivated by a mask
option.
−
−
INT4
• Interrupt
Pin Name
INT1 - INT3
INT4
Pin No.
100-pin TQFP 80-pin BGA
91 - 89
B3, D3, A4
88
B4
I/O
Function
Input
Input
External maskable interrupt input.
• Detected at the falling edge.
Shared by:
−
WAKEUP
10
Data Sheet U14373EJ3V0DS
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