V386GT 查看數據表（PDF） - Integrated Circuit Systems
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V386GT Datasheet PDF : 10 Pages
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V386
8-BIT LVDS RECEIVER FOR VIDEO
RCOP
CLKOUT 0.8 V
2.0 V
2.0 V
0.8 V
RCOH
RCOL
RSRC
RHRC
D0 – D27 Out
2.0 V
SETUP
2.0 V
HOLD
Figure 3. V386 SETUP/HOLD and High/Low Times
2.0 V
RCK
CLKOUT
Figure 4. V386 Clock In to Clock Out Delay
Vdiff=0V
RCCD
1.5V
PWRDWN
VCC
RCK
2.0 V
3.0 V
RPLLS
3.6 V
CLKOUT
Figure 5. V386 Phase Lock Loop Set Time
Figure 6. V386 Power Down Delay
1.5 V
PWRDWN
RPDD
RCK IN
Low
V386 Datasheet
8
5/25/05
Revision 2.0
Integrated Circuit Systems • 525 Race Street, San Jose, CA 95126 • tel (408) 297-1201 • www.icst.com
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