SDA5648 查看數據表（PDF） - Infineon Technologies

零件编号

产品描述 (功能)

生产厂家

SDA5648

Decoder for Program Delivery Control and Video Program System PDC / VPS Decoder

Infineon Technologies 

SDA 5648

SDA 5648X

Pin Definitions and Functions

Pin No. Pin No.

Symbol

P-DIP-14-3 P-DSO-20-1

Function

1

1

2

3

VSS

VSSA

VSSD

N.C.

Ground (0 V)

Analog ground (0 V)

Digital ground (0 V)

Not connected

2

4

SCL

Serial clock input of I2C-Bus.

3

5

SDA

Serial data input of I2C-Bus.

4

6

5

7

CS0

VCS

Chip select input determining the I2C-Bus addresses:

20H / 21H, when pulled low

22H / 23H, when pulled high.

Video Composite Sync output from sync slicer used for

PLL based clock generation.

8

N.C.

Not connected

6

9

DAVN

Data available output active low, when PDC/VPS data

is received.

7

10

EHB

Output signaling the presence of the first field active

high.

8

11

TI

Test input; activates test mode when pulled high.

9

12

PD1

Phase detector/charge pump output of data PLL

(DAPLL).

13

N.C.

Not connected

10

14

PD2/VCO2 Connector of the loop filter for the SYSPLL.

11

15

VCO1

Input to the voltage controlled oscillator #1 of the

DAPLL.

12

16

13

17

IREF

CVBS

Reference current input for the on-chip analog circuit.

Composite video signal input.

18

N.C.

Not connected

14

19

VDD

VDDD

Positive supply voltage (+ 5 V nom.).

Positive supply voltage for the digital circuits

(+ 5 V nom.).

20

VDDA

Positive supply voltage for the analog circuits

(+ 5 V nom.).

Semiconductor Group

23

Share Link: