VSC7123QN 查看數據表（PDF） - Vitesse Semiconductor

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VSC7123QN

10-Bit Transceiver for Fibre Channel and Gigabit Ethernet

Vitesse Semiconductor 

VELOCITYTM

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC7123

10-Bit Transceiver for Fibre

Channel and Gigabit Ethernet

Package Pin Descriptions

Figure 9: Pin Diagram

(Top View)

VSSD

T0

T1

T2

VDDD

T3

T4

T5

T6

VDDD

T7

T8

T9

VSSD

VSSA

CAP0

63 61 59 57 55 53 51 49

1

47

3

45

5

43

7

VSC7123

41

9

39

11

37

13

35

15

33

17 19 21 23 25 27 29 31

TDI

COMDET

VSST

R0

R1

R2

VDDT

R3

R4

R5

R6

VDDT

R7

R8

R9

VSST

Table 5: Pin Identifications

Pin #

2,3,4,6

7,8,9,11

12,13

22

Name

T0,T1,T2,T3

T4,T5,T6,T7

T8,T9

REFCLK

Description

INPUTS - TTL:

10-bit transmit character. Parallel data on this bus is clocked in on the rising edge of

REFCLK. The data bit corresponding to T0 is transmitted first.

INPUT - TTL:

This rising edge of this clock latches T(0:9) into the input register. It also provides the

reference clock, at one tenth the baud rate to the PLL.

G52212-0, Rev 4.3

03/25//01

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

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