VSC7126QX 查看數據表（PDF） - Vitesse Semiconductor

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VSC7126QX

Dual Speed 10-bit Serializer/Deserializer

Vitesse Semiconductor 

1.0625 Gbits/sec Fibre

Channel Transceiver

VITESSE

SEMICONDUCTOR CORPORATION

Datasheet

VSC7126

Figure 8: Transmitter Jitter Measurement Method

Random Jitter Measurement

BERT

Pattern

DATA

Generator DATA

CLK = 1.0625 GHz

DATA = 00000 0000011111 11111

53.125MHz

53.125MHz

Trigger

Digitizing

Scope

RJ

-K28.7 -K28.7

0011111000 0011111000

VSC7126

TX

TBC TX+

TX-

T00:19

1.0625 Gbit/s

Single-Ended Measurement

Random jitter (RJ) measurements performed according to Fibre Channel 4.3 Annex A, Test Methods, Section

A.4.4. Measure standard deviation of all 50% crossing points. Peak to peak RJ is + 7 sigma of distribution.

Deterministic Jitter Measurement

BERT

Pattern

DATA

Generator PAT SYNC

CLK = 1.0625 GHz

DATA = 00000 0000011111 11111

53.125

53.125MHz

Trigger

Digitizing

Scope

DJ

-K28.5 +K28.5

0011111010 1100000101

VSC7126

TX

TBC TX+

TX-

T0:19

1.0625 Gbit/s

Single-Ended Measurement

TRIGGER

DATA

20 bit time

19 bit time

18 bit time

17 bit time

12 bit time

10 bit time

9 bit time

8 bit time

7 bit time

2 bit time

Deterministic jitter (DJ) mea-

surements performed according to

Fibre Channel 4.3 Annex A, Test

Methods, Section A.4.3. Measure

time of all the 50% points of all ten

transitions. DJ is the range of the

timing variation from expected.

Page 10

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52148-0, Rev. 4.3

3/4/99

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