VSC7126 查看數據表（PDF） - Vitesse Semiconductor
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VSC7126 Datasheet PDF : 16 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
VSC7126
AC Characteristics
Figure 4: Transmit Timing Waveforms
1.0625 Gbits/sec Fibre
Channel Transceiver
TBC
T0:19
20 Bit Data
Data Valid
T1
T2
Data Valid
Data Valid
Table 1: Transmit AC Characteristics
Parameters
T1
T2
TSDR,TSDF
TLAT
TRJ
TDJ
Description
Min
Max Units
Conditions
T0:19 Setup time to the
rising edge of TBC
1.5
—
ns.
Measured between the valid data level of
T0:19 to the 1.4V point of TBC
T0:19 hold time after the
rising edge of TBC
2.5
—
ns.
TX+/TX- rise and fall time
—
300
ps.
20% to 80%, 75 Ohm load to Vdd-2V
Tested on a sample basis
Latency from rising edge
of TBC to T0 appearing on
TX+/TX-
20 bc - 4 ns
ns. bc = Bit Clock Periods
Transmitter Output Jitter Allocation
Serial data output random
jitter (RMS)
Serial data output
deterministic jitter (p-p)
—
20
ps.
RMS, tested on a sample basis
(refer to Figure 8)
—
120
ps.
Peak to peak, tested on a sample basis
(refer to Figure 8)
G52148-0, Rev. 4.3
3/4/99
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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