VSC7128 查看數據表（PDF） - Vitesse Semiconductor

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VSC7128

Hex Port Bypass Circuit / Dual Repeater for 1.0625 Gb/s FC-AL Disk Arrays

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Advance Product Information

VSC7128

Hex Port Bypass Circuit / Dual Repeater

for 1.0625 Gb/s FC-AL Disk Arrays

AC Characteristics

Figure 1: AC Timing Diagrams

INx+/-,

LSIx+/-

LSOx+/-,

OUTx+/-

Tp

Tp

80%

20%

Ts

Ts

REFCLK

Tt

Th

Tl

Tt

T

VIH(MIN)

VIL(MAX)

Table 1: AC Characteristics (Over recommended operating conditions).

Parameters

Tp

Ts

Tt

Description

Differential Inputs/Outputs

Latency from IN, LSI to LSO,

OUT

Differential Output Rise/Fall time

Reference Clock Requirements

REFCLK input rise/fall times

F

REFCLK Frequency

T

Fo

DC

Th, Tl

REFCLK Period

Frequency Offset

REFCLK Duty Cycle

REFCLK Input HIGH/LOW time

Min. Max. Units

Conditions

0.25 7.0

—

300

ns 75 Ohm Load

ps

Between 20% and 80%

Tested on a sample basis

—

2.0

ns Between VIL(MAX) and VIH(MIN)

106.25 MHz Nominal if RFSEL is

105

52.5

108

54

MHz

HIGH

53.125 MHz Nominal if RFSEL is

LOW

9.2 9.53

18.5 19.0

ns

RFSEL = HIGH

RFSEL = LOW

Maximum frequency offset between

-200 +200 ppm 10 or 20 times REFCLK and the data

rate of the serial input to the CRU.

35

65

% Measured at 1.5V

2.5

—

ns.

From VIL(min) to VIH(min) or VIH(max)

to VIL(max)

G52177-0, Rev. 2.3

8/31/98

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

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