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VSC7133QU 查看數據表(PDF) - Vitesse Semiconductor

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VSC7133QU Datasheet PDF : 18 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
10-bit Transceiver for Fibre
Channel and Gigabit Ethernet
Advance Product Information
VSC7133
AC Characteristics
Figure 4: Transmit Timing Waveforms
REFCLK
T(0:9)
Data Valid
T1
T2
Data Valid
Data Valid
Table 2: Transmit AC Characteristics
Parameters
Description
Min
Max Units
Conditions
T1
T(0:9) Setup time to the
rising edge of REFCLK
Measured between the valid
1.5
ns. data level of T(0:9) to the 1.4V
point of REFCLK
T2
T(0:9) hold time after the
rising edge of REFCLK
1.0
ns.
TSDR,TSDF TX+/TX- rise and fall time
Latency from rising edge of
TLAT
REFCLK to T0 appearing on
8bc
TX+/TX-
20% to 80%, 50 Ohm load to
300
ps. VDD-2.0
8bc+
4ns
ns
bc = Bit clocks
ns = Nano second
Transmitter Output Jitter Allocation
TJ
Total data output jitter
Serial data output
TDJ
deterministic jitter (p-p)
192
ps. IEEE 802.3z Clause 38.68,
80
ps. IEEE 802.3z Clause 38.68,
Page 6
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52187-0 Rev. 2.4
1/17/00

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