VSC7938W 查看數據表（PDF） - Vitesse Semiconductor
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VSC7938W Datasheet PDF : 16 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
SONET/SDH 3.125Gb/s
Laser Diode Driver with Automatic Power Control
Preliminary Data Sheet
VSC7938
Laser Diode Interface
An RC shunt network should be placed at the laser output interface. The sum of the resistor placed at the
output and the laser diode resistance should be 25Ω. For example, if the laser diode has a resistance of 5Ω, a
20Ω resistor should be placed in series with the laser. For optimal performance, a bypass capacitor should be
placed close to the laser anode.
A “snubber network” consisting of a capacitor CF and resistor RF should be placed at the laser output to
minimize reflections from the laser (see Block Diagram). Suggested values for these components are 80Ω and
2pF, respectively. However, these values should be adjusted until an optical output waveform is obtained.
Reducing Pattern-Dependent Jitter
Three design values significantly affect pattern-dependent jitter; the capacitor at CAPC, the pull-up induc-
tor at the output (LP), and the AC-coupling capacitor at the output (CD). As previously stated, the recommended
value for the capacitor at CAPC is 0.1µF. This results in a 10kHz loop bandwidth which makes the pattern-
dependent jitter from the APC loop negligible.
For 2.5Gb/s data rates, the recommended value for CD is 0.056µF. The time constant at the output is domi-
nated by LP. The variation in the peak voltage should be less that 12% of the average voltage over the maximum
consecutive identical digit (CID) period. The following equation approximates this time constant for a CID
period, t, of 100UI = 40ns:
τLP = -t / ln(1-12%) = 7.8t = LP / 25Ω
Therefore, the inductor LP should be a 7.8µH SMD ferrite bead inductor for this case.
Input/Output Considerations
Although the VSC7938 is PECL compatible, this is not required to drive the device. The inputs must only
meet the common-mode voltage and differential voltage swing specifications.
Power Consumption
The following equation provides the device supply current (IS) in terms of quiescent current (IQ), modula-
tion current (IMOD), and bias current (IBIAS):
IS = IQ + 0.47 * IMOD + 0.15 * IBIAS
For 3.3V operation, IQ is 15mA. For 5V operation, IQ is 20mA.
This equation may be used to determine the estimated power dissipation:
PDIS = VCC * IS
For example, if the device were operated at 3.3V with a 30mA modulation current and a 10mA bias current,
the supply current would be:
IS = 15mA + 0.47 * 30mA + 0.15 * 10mA = 31
This corresponds to a power dissipation of 3.3V * 31mA = 102mW.
Page 10
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52349-0, Rev 3.0
01/20/01
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