VSC8115YA1 查看數據表（PDF） - Vitesse Semiconductor

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VSC8115YA1

STS-12/STS-3 Multi Rate Clock and Data Recovery Unit

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

STS-12/STS-3 Multi Rate

Clock and Data Recovery Unit

Target Specification

VSC8115

Table 6: LVDS Differential Outputs

Parameters Description

Min

VOCM

Common Mode

voltage

1.0

∆VOUT

Differential

Output Swing

350

Table 7: LVPECL Differential Outputs

Parameters Description

Min

VOCM

Common Mode

voltage

1.12

∆VOUT

Differential

Output Swing

400

Table 8: LVTTL Inputs

Parameters

Description

Min

VIH

Input HIGH voltage

2.0

VIL

Input LOW voltage

0

IIH

Input HIGH current

-50

IIL

Input LOW current

-50

Typ

Max

Units

Conditions

1.35

1.7

V

100Ω PAD to

PADN

500

750

mV

100Ω PAD to

PADN

Typ

Max

Units

Conditions

-

2.0

V 50Ω to (VDD - 2V)

-

800

mV 50Ω to (VDD - 2V)

Typ

Max Units

Conditions

—

VDD

V—

—

0.8

V—

---

50

µA VIN = 2.7V, VDD=MAX

---

50

µA VIN = 0.5V, VDD=MAX

Power Dissipation

Table 9: Power Supply Currents

Parameter

IDD

PD

Description

Power supply current from VDD

Power dissipation

(Typ)

57

188.1

(Max)

80

277

Units

mA

mW

Page 8

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52272-0, Rev. 1.1

9/29/00

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