VSC838UG 查看數據表（PDF） - Vitesse Semiconductor

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VSC838UG

3.2Gb/s 36x37 Crosspoint Switch

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

VSC838

3.2Gb/s

36x37 Crosspoint Switch

Figure 3: Serial Mode (leave ALE_SCN pin LOW during programming)

INCHAN0_SDIN

INCHAN1_SCLK

SDOUT

LOAD

CS

CONFIG

SERIAL

Y5 Y4 Y3 Y2 low Y1 Y0 A5 A4 A3 A2 low A1 A0

TsSDIN ThSDIN

TperSCLK

TsCS

TsLOAD

TdSDOUT

Y5 Y4

ThLOAD

Y3 Y2

ThCS

TPWCFG

TsSERIAL Y(n) = Output Address Bit (n); A(n) = Input Address Bit (n)

Figure 4: Serial Read-Back

ALE_SCN

INCHAN1_SCLK

SDOUT

SERIAL

ThSCAN

TsSCAN

TperSCLK

TsSERIAL

TdSDOUT

36 36 36 36 36 36 36 35 35 35 35 35 35 35 34

b5 b4 b3 b2 low b1 b0 b5 b4 b3 b2 low b1 b0 b5

MSB of Program memory for

Activity Monitor Channel

MSB of Program memory for 36th

output channel

Read-back shift register (483 bits long) is loaded here

on rising edge of INCHAN1_SCLK with SERIAL HIGH

and ALE_SCN LOW

NOTE: The word pattern during serial read back will be four valid words followed by four ‘DON’T CARE’ words.

G52351-0, Rev 3.0

02/12/01

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