VSC837 查看數據表（PDF） - Vitesse Semiconductor
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VSC837 Datasheet PDF : 26 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
3.2Gb/s
68x68 Crosspoint Switch
Preliminary Data Sheet
VSC837
Burst Mode
Burst mode programming (BURST=1, SERIAL=0) enables an input to be broadcast to any group of 1 to 17
outputs with a single command. In this mode, rising edges on the LOAD pin will trigger program operations.
The INCHAN[6:0] pins represent the input to be broadcast. The OUTCHAN[18:17] pins represent the page
(quarter) of the program memory to access, and each of the OUTCHAN[16:0] pins represents 1 of the 17 out-
puts within that page. A ’1’ on any of those pins will cause that output to be programmed to connect to the input
named on INCHAN[6:0].
No read-back capability is provided in burst mode. See Serial Read-Back section above.
Activity Monitoring
The activity monitor observes the output of the internal 69th output from the core. By programming the
69th output to observe various inputs, the input signals can be scanned for activity or lack thereof. Each rising
edge of ACTCLK causes the monitor to read out the activity state from the previous ACTCLK period and clears
the internal activity state until a data transition triggers it again. There must be a minimum of one rising and one
falling edge on the observed input data pin during the ACTCLK period for activity to be detected. After power-
on the output of ACTIVITY after the first ACTCLK rising edge is unknown.
Selective Power-Down
Unused input and output channels can be made to consume little or no power via one of two methods of
selective power-down.
Software Power-Down
Using this feature, unused outputs may be disabled, saving approximately 170 mW per channel for maxi-
mum dissipation conditions. This is accomplished by programming each unused output to look at input 127 (7F
Hex), which represents a non-existent input channel. The channel may be subsequently activated by program-
ming a valid input address. It is recommended, however, that any changes in power programming only be exe-
cuted as part of an initialization sequence to guard against the effects of any switching transients that might
result from changing the power supply current suddenly. Software mode does not affect the functioning or
power of unused input channels.
Hardware Power-Down
Using this feature, the power associated with given pairs of inputs may be shut off by tying the correspond-
ing VEE pin to VCC (see Table 10). Approximately 160 mW per input pair is saved under the maximum dissipa-
tion conditions. The power associated with given pairs of outputs, including their contribution to the core
power, can be shut off by tying the corresponding VEE pin to VCC (see Table 10). Approximately 360 mW per
output pair is saved under the maximum dissipation conditions.
Certain VEE pins must always be active. In other words, tied to the most negative supply, so the correspond-
ing inputs and outputs will always be on and consuming power. See Figure 6 and Table 10 for the location of
these pins.
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© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52309-0, Rev 3.0
02/16/01
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