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VSC8114

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery

Vitesse Semiconductor 

Data Sheet

VSC8114

VITESSE

SEMICONDUCTOR CORPORATION

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux

with Integrated Clock Generation and Clock Recovery

Equipment Loopback

The Equipment Loopback function is controlled by the EQULOOP signal. When the EQULOOP signal is

set high, the Equipment Loopback mode is activated and the high speed transmit data generated from the paral-

lel to serial conversion of the low speed data (TXIN[7:0]) is selected and converted back to parallel data in the

receiver section and presented to the low speed parallel outputs (RXOUT[7:0]). See Figure 4. The internally

generated 622MHz clock is used to generate the low speed receive clock output (RXLSCKOUT). In Equipment

Loopback mode the transmit data (TXIN[7:0]) is serialized and presented to the high speed output

(TXDATAOUT) using the clock generated by the on-chip clock multiplier unit.

CRU Equipment Loopback

Exactly the same as equipment loopback, the point where the transmit data is looped back is moved all the

way back to the high speed I/O. When the CRUEQLP signal is set high, transmit data is looped back to the

CRU, replacing RXDATAIN±

Figure 4: Equipment Loopback Data Path

RXDATAIN

EQULOOP

TXDATAOUT

DQ

0

1

QD

1:8

Serial to

Parallel

÷8

8:1

Parallel to

Serial

DQ

QD

PLL

÷8

RXOUT[7:0]

RXLSCKOUT

TXIN[7:0]

TXLSCKIN

TXLSCKOUT

Split Loopback

Equipment and facility loopback modes can be enabled simultaneously. In this case, high-speed serial data

received (RXDATAIN) is mux’d through to the high-speed serial outputs (TXDATAOUT). The low-speed trans-

mit byte-wide bus (TXIN[7:0]) and (TXLSCKIN) is mux’d into the low-speed byte-wide receive output bus

(RXOUT[7:0]) and (RXLSCKOUT). See Figure 5.

Figure 5: Split Loopback Datapath

RXDATAIN

RXCLKIN

DSBLCRU

TXDATAOUT

CRU

DQ

Recovered

Clock

0

1

QD

1:8

Serial to

Parallel

DQ

8:1

Parallel to

Serial

QD

RXOUT[7:0]

RXLSCKOUT

TXIN[[7:0]

TXLSCKIN

G52185-0, Rev 4.0

11/1/99

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

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