VSC8124RE 查看數據表（PDF） - Vitesse Semiconductor

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VSC8124RE

2.488 Gb/s Quad Data Re-timer

Vitesse Semiconductor 

2.488 Gb/s Quad

Data Re-timer

VITESSE

SEMICONDUCTOR CORPORATION

Target Specification

VSC8124

Table 11: Power Supply Pin Summary

Signal

Pin

VCC

VEE

VTT

VCCA1

VCCA2

VEEA1

VEEA2

VCC_ANA

VEE_ANA

VTERM[0:5]

1,8,13,14,18,23,

25,26,28,41,48,50,

51,62,70,75,76,85,

100

3,7,12,19,24,27,

31,40,49,52,65,

74,77,86,95,98

42,84

35

91

36

90

59

58

5,10,16,21,64,68,

72

I/O

PWR

PWR

PWR

PWR

PWR

PWR

PWR

PWR

PWR

PWR

Level

+3.3V

Pin Description

GND

+1.3V

+3.3V

+3.3V

GND

GND

+3.3V

GND

VCC/2

dirty VCC for RDAT[0:1]

dirty VCC for RDAT[2:3]

dirty VEE for RDAT[0:1]

dirty VEE for RDAT[2:3]

clean VCC for VCO/CMU

clean VEE for VCO/CMU

All supplies which reference the same voltage may be connected to the same power supply plane. The

VCCANA and VEEANA are noise sensitive supplies, while the VCCA1, VCCA2, VEEA1 and VEEA2 are

noise generating supplies. Appropriate power supply noise suppression should be applied to optimize the per-

formance of the device.

Page 16

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52271-0, Rev. 1.14

2/23/00

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