VSC8150QQ 查看數據表（PDF） - Vitesse Semiconductor
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VSC8150QQ Datasheet PDF : 20 Pages
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2.488Gb/s SONET/SDH
Overhead Monitor
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC8150
Figure 10: Framing and B1 Error Output Timing
RXFPOUT
RXFRERR
RXSEF
B1ERR
Note: Waveforms not to scale
TFPW
TFERRSU
TSEFSU
TFERRPW
TB1SU
TB1PWH
TB1PWL
Table 6: Framing and B1 Error Output Timing (STS-48/STM-16 Mode)
Parameter
Description
Min
Typ
TFPW
Frame Pulse Width
—
51.4
TFERRSU
Frame Boundary Error delay with respect to RXFPOUT
—
61.2
TFERRPW
Frame Boundary Error pulse width high
—
25.7
TSEFSU
SEF transition delay time with respect to RXFPOUT
—
48.3
TB1SU
B1 Pulse train delay with respect to RXFPOUT
—
14
TB1PWH
B1 error pulse width high
—
25.7
TB1PWL
B1 error pulse width low
—
25.7
Note: Generated Waveforms are synchronous and assume a 2.488GHz RXSCLKIN signal.
Table 7: Framing and B1 Error Output Timing (STS-12/STM-4 Mode)
Parameter
Description
Min
Typ
TFPW
Frame Pulse Width
—
51.4
TFERRSU
Frame Boundary Error delay with respect to RXFPOUT
—
64.4
TFERRPW
Frame Boundary Error pulse width high
—
51.4
TSEFSU
SEF transition delay time with respect to RXFPOUT
—
51.4
TB1SU
B1 Pulse train delay with respect to RXFPOUT
—
14
TB1PWH
B1 error pulse width high
—
103
TB1PWL
B1 error pulse width low
—
103
Note: Generated Waveforms are synchronous and assume a 622MHz RXSCLKIN signal.
Max
—
—
—
—
—
—
—
Max
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
µs
ns
ns
Units
ns
ns
ns
ns
µs
ns
ns
Page 10
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52186-0, Rev. 3.0
10/12/98
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