VT73LVP10 查看數據表（PDF） - Vaishali Semiconductor
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VT73LVP10 Datasheet PDF : 3 Pages
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VT73LVP10
Preliminary
Table 1. Pin Description
Name
/EN
Q
QN
VDD
D
GND
Description
CMOS/TTL Active LOW enable input, with pull-down resistor
PECL data output
PECL complementary data output
Connect to 3.3V
CMOS/TTL data input
Connect to ground
Legend: I = Input
O = Output
P = Power supply connection
* = Internal 100kΩ pull-down resistor
Type
I
O
O
P
I
P
Pin #
4*
2
3
8
7
5
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min
Typ
Max Units
VDD
Supply voltage
Referenced to GND
6
V
VIN
Input voltage
Referenced to GND
-0.5
6
V
IOUT
TSTG
Output current in LOW state
Storage temperature
50
mA
-65
150
oC
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Table 3. Operating Conditions
Symbol
VDD
TA
VIH
VIL
tRin
tFin
Parameter
Power Supply Voltage
Ambient Temperature
Input HIGH Voltage
Input LOW Voltage
Input slew rate
Input slew rate
Conditions
D, /EN inputs
D, /EN inputs
10% to 90% (L → H)
90% to 10% (H → L)
Min
Typ
Max
Units
3.0
3.6
V
-40
85
oC
2.0
V
0.8
V
1
V/ns
1
V/ns
2002-01-15
Vaishali Semiconductor
Page 2
www.vaishali.com
747 Camden Avenue, Suite C Campbell CA 95008
Ph. 408.377.6060
MDST-0014-06
Fax 408.377.6063
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