W24256 查看數據表（PDF） - Winbond
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W24256 Datasheet PDF : 10 Pages
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Preliminary W24256
GENERAL DESCRIPTION
32K × 8 CMOS STATIC RAM
The W24256 is a normal speed, very low power CMOS static RAM organized as 32768 × 8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
• Low power consumption:
• Access time: 70 nS (max.)
• Active :300 mW
Standby :250 µW
• Single 5V power supply
• Fully static operation
• All inputs and outputs directly TTL compatible
• Three-state outputs
• Battery back-up operation capability
• Data retention voltage: 2V (min.)
• Packaged in 28-pin 600 mil DIP, 330 mil SOP
and standard type one TSOP (8 mm × 13.4
mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
A14
1
28
A12
2
27
A7
3
26
A6
4
25
A5
5
24
A4
6
A3
7
A2
8
23
28-pin
DIP
22
21
A1
9
20
A0
10
19
I/O1
11
18
I/O2
12
17
I/O3
13
16
VSS
14
15
VDD
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
CLK GEN.
PRECHARGE CKT.
A12
A14
R
A2
O
W
A3
CORE CELL ARRAY
D
A4
E
512 ROWS
C
A5
O
64 X 8 COLUMNS
D
A6
E
R
A7
A13
I/O1
DATA
I/O CKT.
I/O8
CNTRL. COLUMN DECODER
CLK
GEN.
A11 A10 A1 A0 A8 A9
WE
CS
OE
OE
1
A11 2
A9
3
A8
4
A13
5
WE
6
VDD
7
A14
8
A12
9
A7
10
A6
11
A5
12
A4
13
A3
14
28-pin
TSOP
28
A10
27 CS
26 I/O8
25 I/O7
24
I/O6
23 I/O5
22 I/O4
21
VSS
20
I/O3
19 I/O2
18 I/O1
17 A0
16 A1
15
A2
PIN DESCRIPTION
SYMBOL
A0−A14
I/O1−I/O8
CS
WE
OE
VDD
VSS
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
Publication Release Date: October 1999
-1-
Revision A1
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