WM2633 查看數據表（PDF） - Wolfson Microelectronics plc

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WM2633

Byte-wide Parallel Input, 12-bit Voltage Output DAC with Internal Reference

Wolfson Microelectronics plc 

Production Data

WM2633

Test Characteristics:

RL = 10kΩ, CL = 100pF AVDD = DVDD = 5V ± 10%, VREF = 2.048V and AVDD = DVDD = 3V ± 10%, VREF = 1.024V over

recommended operating free-air temperature range (unless noted otherwise).

PARAMETER

Glitch energy

SYMBOL

TEST

CONDITIONS

MIN

TYP

MAX UNIT

Code 2047 to code 2048

5

nV-s

Signal to noise ratio

SNR

fS = 480ksps,

73

78

dB

fOUT = 1kHz BW = 20kHz,

TA=25°C See Note 12

Signal to noise and distortion ratio

SNRD

fS = 480ksps,

61

67

dB

fOUT = 1kHz BW = 20kHz,

TA=25°C See Note 12

Total harmonic distortion

THD

fS = 480ksps,

fOUT = 1kHz BW = 20kHz,

TA=25°C See Note 12

-69

-62

dB

Spurious free dynamic range

SPFDR

fS = 480ksps,

63

74

dB

fOUT = 1kHz BW = 20kHz, TA =

25°C See Note 12

Reference Configured as Input

Reference input resistance

RREF

10

MΩ

Reference input capacitance

CREF

55

pF

Reference feedthrough

Reference input bandwidth

Reference Configured as Output

VREF=1VPP at 1kHz

-60

dB

+ 1.024V d.c., DAC code 0

VREF= 0.2VPP + 1.024V d.c.

DAC code 2048

Slow

500

kHz

Fast

900

kHz

Low reference voltage

VREFOUTL

1.003 1.024 1.045

V

High reference voltage

VREFOUTH

VDD > 4.75V

2.027 2.048 2.069

V

Output source current

IREFSRC

1

mA

Output sink current

IREFSNK

-1

mA

Load Capacitance

100

pF

PSRR

-48

dB

Digital Inputs

High level input current

Low level input current

IIH

Input voltage = DVDD

IIL

Input voltage = 0V

1

µA

-1

µA

Input capacitance

CI

8

pF

Notes:

1. Integral non-linearity (INL) is the maximum deviation of the output from the line between zero and full scale excluding

the effects of zero code and full scale errors).

2. Differential non-linearity (DNL) is the difference between the measured and ideal 1LSB amplitude change

of any adjacent two codes. A guarantee of monotonicity means the output voltage changes in the same

direction (or remains constant) as a change in digital input code.

3. Zero code error is the voltage output when the DAC input code is zero.

4. Gain error is the deviation from the ideal full scale output excluding the effects of zero code error.

5. Power supply rejection ratio is measured by varying AVDD from 4.5V to 5.5V and measuring the

proportion of this signal imposed on the zero code error and the gain error.

6. Zero code error and Gain error temperature coefficients are normalised to full scale voltage.

7. Output load regulation is the difference between the output voltage at full scale with a 10kΩ load and 2kΩ

load. It is expressed as a percentage of the full scale output voltage with a 10kΩ load.

WOLFSON MICROELECTRONICS LTD

PD Rev 1.0 July 1999

5

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