WM8195 查看數據表（PDF） - Wolfson Microelectronics plc
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WM8195 Datasheet PDF : 33 Pages
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WM8195
Production Data
OEB
OP[13:0]
tPZE
Hi-Z
tPEZ
Hi-Z
Figure 3 Output Data Enable Timing
Test Conditions
AVDD1 = AVDD2 = DVDD1 = DVDD2 = DVDD3 =4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
Output propagation delay
Output enable time
Output disable time
SYMBOL
tPD
tPZE
tPEZ
TEST CONDITIONS
IOH = 1mA, IOL = 1mA
MIN
TYP
MAX
40
20
15
UNITS
ns
ns
ns
MCLK
RLC/ACYC
PGA/OFFSET
MUX OUTPUT
tACYCSU
tACYCH
tACYCSU
tACYCH
Figure 4 Auto Cycle Timing
Test Conditions
AVDD = DVDD1 = 4.75 to 5.25V, DVDD2 = 2.97 to 3.63V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 32MHz unless
otherwise stated.
PARAMETER
Auto Cycle set-up time
Auto Cycle hold time
SYMBOL
tACYCSU
tACYCH
TEST CONDITIONS
MIN
6
3
TYP
MAX
UNITS
ns
ns
w
PD Rev 4.1 July 2005
10
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