X20C17PI-45 查看數據表（PDF） - Xicor -> Intersil

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X20C17PI-45

High Speed AUTOSTORE™ NOVRAM

Xicor -> Intersil 

X20C17

PIN DESCRIPTIONS

Addresses (A0–A10)

The Address inputs select an 8-bit memory location

during a read or write operation.

Chip Enable (CE)

The Chip Enable input must be LOW to enable all read/

write operations. When CE is HIGH, power consumption

is reduced.

Output Enable (OE)

The Output Enable input controls the data output buffers

and is used to initiate read and recall operations. Output

Enable LOW disables a store operation regardless of

the state of CE, WE.

Data In/Data Out (I/O0–I/O7)

Data is written to or read from the X20C17 through the

I/O pins. The I/O pins are placed in the high impedance

state when either CE or OE is HIGH.

Write Enable (WE)

The Write Enable input controls the writing of data to the

static RAM.

FUNCTIONAL DIAGRAM

PIN NAMES

Symbol

A0–A10

I/O0–I/O7

WE

CE

OE

VCC

VSS

Description

Address Inputs

Data Input/Output

Write Enable

Chip Enable

Output Enable

+5V

Ground

2015 PGM T01

A3–A8

CE

OE

WE

A0–A2

A9–A10

CONTROL

LOGIC

VCC SENSE

EEPROM ARRAY

ROW

SELECT

HIGH SPEED

2K x 8

SRAM

ARRAY

COLUMN

SELECT

&

I/OS

I/O0–I/O7

2

2015 FHD F01.1

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