X24C01APG 查看數據表（PDF） - Unspecified

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X24C01APG

Serial E2PROM

Unspecified 

X24C01A

DEVICE ADDRESSING

Following a start condition the master must output the

address of the slave it is accessing. The most significant

four bits of the slave address are the device type

identifier (see Figure 4). For the X24C01A this is fixed as

1010[B].

Figure 4. Slave Address

Following the start condition, the X24C01A monitors the

SDA bus comparing the slave address being transmitted

with its slave address (device type and state of A0, A1 and

A2 inputs). Upon a correct compare the X24C01A

outputs an acknowledge on the SDA line. Depending on the

state of the R/W bit, the X24C01A will execute a read

or write operation.

WRITE OPERATIONS

DEVICE TYPE

IDENTIFIER

1 0 1 0 A2 A1 A0 R/W

DEVICE

ADDRESS

3841 FHD F08

The next three significant bits address a particular

device. A system could have up to eight X24C01A

devices on the bus (see Figure 10). The eight addresses are

defined by the state of the A0, A1 and A2 inputs.

The last bit of the slave address defines the operation to be

performed. When set to one a read operation is

selected, when set to zero a write operation is selected.

Figure 5. Byte Write

Byte Write

For a write operation, the X24C01A requires a second

address field. This address field is the word address,

comprised of eight bits, providing access to any one of the

128 words of memory. Note: the most significant bit

is a don’t care. Upon receipt of the word address the

X24C01A responds with an acknowledge, and awaits

the next eight bits of data, again responding with an

acknowledge. The master then terminates the transfer

by generating a stop condition, at which time the X24C01A

begins the internal write cycle to the nonvolatile memory.

While the internal write cycle is in progress the X24C01A

inputs are disabled, and the device will not respond to

any requests from the master. Refer to Figure 5 for the

address, acknowledge and data transfer sequence.

S

T

BUS ACTIVITY: A

MASTER

R

T

SLAVE

ADDRESS

WORD

ADDRESS

S

DATA

T

O

P

SDA LINE

S

P

BUS ACTIVITY:

X24C01A

A

A

A

C

C

C

K

K

K

3841 FHD F09

Figure 6. Page Write

S

T

BUS ACTIVITY: A

MASTER

R

T

SDA LINE

S

SLAVE

ADDRESS

BUS ACTIVITY:

X24C01A

WORD ADDRESS n

A

A

C

C

K

K

DATA n

DATA n–1

A

A

C

C

K

K

NOTE: In this example n = xxxx 0000 (B); x = 1 or 0

S

DATA n+3

T

O

P

P

A

C

K

3841 FHD F10

4

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