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ICX059CL 查看數據表(PDF) - Sony Semiconductor

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ICX059CL Datasheet PDF : 17 Pages
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ICX259AL
Clock Switching Characteristics
twh
twl
tr
tf
Item
Symbol
Unit Remarks
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Readout clock VT
2.3 2.5
0.5
0.5
µs
During
readout
Vertical transfer Vφ1, Vφ2,
clock
Vφ3, Vφ4
15
250 ns 1
During
Hφ1
imaging
Hφ2
During
Hφ1
parallel-serial
conversion Hφ2
26 28.5
26 28.5
5.38
26 28.5
26 28.5
5.38
6.5 9.5
6.5 9.5
0.01
0.01
6.5 9.5 ns 2
6.5 9.5
0.01
µs
0.01
Reset gate clock φRG
11 13
51
3
3
ns
Substrate clock φSUB
1.5 1.8
0.5
0.5
µs
During drain
charge
1 When vertical transfer clock driver CXD1267AN is used.
2 tf tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be
at least VφH/2 [V].
two
Item
Symbol
Unit Remarks
Min.
Typ.
Max.
Horizontal transfer clock Hφ1, Hφ2
22
26
ns
3
3 The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
–7–

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