ICX039DLA 查看數據表（PDF） - Sony Semiconductor
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产品描述 (功能)
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ICX039DLA
Sony Semiconductor
ICX039DLA Datasheet PDF : 20 Pages
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(5) Substrate clock waveform
100%
90%
VSUB
10%
0%
VφSUB
tr
twh
φM
φM
2
tf
ICX039DLA
Clock Switching Characteristics
twh
twl
tr
tf
Item
Symbol
Unit Remarks
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Readout clock VT
2.3 2.5
0.5
0.5
µs
During
readout
Vertical transfer Vφ1, Vφ2,
clock
Vφ3, Vφ4
15
250 ns ∗1
During
imaging
Hφ
20
20
15 19
15 19 ns ∗2
During parallel- Hφ1
serial
conversion Hφ2
5.38
0.01
0.01
µs
5.38
0.01
0.01
Reset gate clock φRG
11 13
51
3
3
ns
Substrate clock φSUB
1.5 1.8
∗1 When vertical transfer clock driver CXD1267AN is used.
∗2 tf ≥ tr – 2ns.
0.5
0.5
µs
During drain
charge
Item
Symbol
Horizontal transfer clock Hφ1, Hφ2
two
Unit Remarks
Min. Typ. Max.
16
20
ns
∗3
∗3 The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
–9–
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