SAA7182 查看數據表（PDF） - Philips Electronics

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SAA7182

Digital Video Encoder (EURO-DENC)

Philips Electronics 

Philips Semiconductors

Digital Video Encoder (EURO-DENC)

Preliminary specification

SAA7182; SAA7183

FEATURES

• CMOS 5 V device

• Digital PAL/NTSC/SECAM encoder

• System pixel frequency 13.5 MHz

• Accepts MPEG decoded data on 8-bit wide input port.

Input data format Cb, Y, Cr etc. or Y and Cb, Cr on

16 lines (“CCIR 656”)

• Three DACs for CVBS, Y and C operating at 27 MHz

with 10-bit resolution

• Three DACs for RGB operating at 27 MHz with 9-bit

resolution, RGB sync on CVBS and Y

• CVBS, Y, C and RGB output simultaneously

• Closed captioning and teletext encoding including

sequencer and filter

• On-chip YUV to RGB matrix

• Fast I2C-bus control port (400 kHz)

• Encoder can be master or slave

• Programmable horizontal and vertical input

synchronization phase

• Programmable horizontal sync output phase

• Internal Colour Bar Generator (CBG)

• Overlay with Look-Up Tables (LUTs) 8 × 3 bytes

• Macrovision Pay-per-View protection system as option,

also used for RGB output

This applies to SAA7183 only. The device is protected

by USA patent numbers 461603, 4577216 and 4819098

and other intellectual property rights.

Use of the Macrovision anti-copy process in the device

is licensed for non-commercial home use only. Reverse

engineering or disassembly is prohibited. Please

contact your nearest Philips Semiconductor sales office

for more information

• Controlled rise/fall times of output syncs and blanking

• Down-mode of DACs

• PLCC84 package.

GENERAL DESCRIPTION

The SAA7182; SAA7183 encodes digital YUV video data

to an NTSC, PAL, SECAM CVBS or S-Video signal and

also RGB.

The circuit accepts CCIR compatible YUV data with

720 active pixels per line in 4 : 2 : 2 multiplexed formats,

for example MPEG decoded data. It includes a sync/clock

generator and on-chip Digital-to-Analog Converters

(DACs).

The circuit is compatible to the DIG-TV2 chip family.

QUICK REFERENCE DATA

SYMBOL

VDDA

VDDD

IDDA

IDDD

Vi

Vo(p-p)

RL

ILE

DLE

Tamb

PARAMETER

analog supply voltage

digital supply voltage

analog supply current

digital supply current

input signal voltage levels

analog output signal voltages Y, C, CVBS and RGB

without load (peak-to-peak value)

load resistance

LF integral linearity error

LF differential linearity error

operating ambient temperature

MIN. TYP. MAX.

4.75 5.0

5.25

4.75 5.0

5.25

−

90

110

−

220

250

TTL compatible

−

2

−

UNIT

V

V

mA

mA

V

80

−

−

−

−

−

0

−

−

Ω

±2

LSB

±1

LSB

+70

°C

1996 Jul 08

2

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