XD010-22S-D2F(RevB) 查看數據表（PDF） - Sirenza Microdevices => RFMD

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XD010-22S-D2F
(Rev.:RevB)

1805-1880 MHz Class A/AB 10W Power Amplifier Module

Sirenza Microdevices => RFMD 

Preliminary

XD010-22S-D2F 1805-1880 MHz 10W

Pin Out Description

Pin #

Function

Description

1

RF Input Module RF input. Care must be taken to protect against video transients that may damage the active devices.

2

VDD1

This is the bias feed for the 1st stage of the amplifier module. The gate bias is temperature compensated to

maintain constant current over the operating temperature range. See Note 1.

3,4

VDD2

This is the bias feed for the 2nd stage of the amplifier module. The gate bias is temperature compensated to

maintain constant current over the operating temperature range. See Note 1.

5

RF Output Module RF output. Care must be taken to protect against video transients that may damage the active devices.

Flange

Gnd

Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the

board for optimum thermal and RF performance. See mounting instructions for recommendation.

Simplified Device Schematic

2 Vdd1

3 4 Vdd2

RF

in

1

Temperature

Compensation

Q1

Temperature

Compensation

Q2

RF

out

5

Case Flange = Ground

Absolute Maximum Ratings

Parameters

1st Stage Bias Voltage (VDD1 )

2nd Stage Bias Voltage (VDD2)

RF Input Power

Value

35

35

+20

Unit

V

V

dBm

Load Impedance for Continuous Operation

Without Damage

5:1

VSWR

Output Device Channel Temperature

200

ºC

Lead Temperature During Solder Reflow

+210

ºC

Operating Temperature Range

-20 to +90

ºC

Storage Temperature Range

-40 to +100 ºC

Operation of this device beyond any one of these limits may

cause permanent damage. For reliable continuous operation see

typical setup values specified in the table on page one.

Note 1:

The internal generated gate voltage is ther-

mally compensated to maintain constant qui-

escent current over the temperature range

listed in the data sheet. No compensation is

provided for gain changes with temperature.

This can only be provided with AGC external

to the module.

Note 2:

Internal RF decoupling is included on all bias

leads. No additional bypass elements are

required, however some applications may

require energy storage on the drain leads to

accommodate time-varying waveforms.

Caution: ESD Sensitive

Appropriate precaution in handling, packaging

and testing devices must be observed.

522 Almanor Ave., Sunnyvale, CA 94085

Phone: (800) SMI-MMIC

2

http://www.sirenza.com

EDS-102930 Rev B

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