5503-CGT 查看數據表（PDF） - TDK Corporation

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5503-CGT

Direct Conversion Receiver

TDK Corporation 

5503 DCR

Direct Conversion Receiver

DESCRIPTION OF INTERNAL REGISTERS

Register 0 VCO divide ratio, bits 14 thru 8, msb always set to 0

Register 1

Register 2

VCO divide ratio, bits 7 thru 0

msb

Not Used. Always set to 1

VCO divide ratio, bits 16 and 15

PE, Prescaler enable. PE=1 enables divide by two prescaler

R3,R2,R1,R0 Reference division ratio, as shown in following table:

R3 R2 R1 R0

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Reference

division ratio

2

4

8

16

32

64

128

256

Undefined

5

10

20

40

80

160

320

Register 3 C1, C0

Phase detector current control, as shown in following table:

ipump word

C1 C0

00

01

10

11

Phase Detector

charge current µA

100

200

300

400

6

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