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XRT59L921 查看數據表(PDF) - Exar Corporation

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XRT59L921 Datasheet PDF : 32 Pages
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XRT59L921
TWENTY-ONE CHANNEL E1 LINE INTERFACE UNIT
PIN DESCRIPTIONS
REV. 1.2.1
PIN#
SYMBOL
TYPE
DESCRIPTION
A3
A5
B5
C6
E5
A7
U5
W6
Y7
Y5
Y3
Y18
W18
Y16
W15
U16
E16
C17
A16
A17
A19
TxPOS_0
TxPOS_1
TxPOS_2
TxPOS_3
TxPOS_4
TxPOS_5
TxPOS_6
TxPOS_7
TxPOS_8
TxPOS_9
TxPOS_10
TxPOS_11
TxPOS_12
TxPOS_13
TxPOS_14
TxPOS_15
TxPOS_16
TxPOS_17
TxPOS_18
TxPOS_19
TxPOS_20
I Transmitter - Positive Data Input – Channel_n:
The exact signal that should be applied to this input pin depends upon whether the
user intends to operate the Transmit Section (of Channel_n) in the Clock or Clock-
less Mode.
Clock Mode:
The Terminal Equipment should apply bit-wide NRZ pulses on this input whenever
the Terminal Equipment needs to transmit a Positive-Polarity pulse onto the line via
TTIP_n and TRing_n output pins. The XRT59L921 will sample this input pin upon the
falling edge of the TClk_n signal.
Clockless Mode:
The Terminal Equipment should apply RZ pulses to this input pin, anytime the Termi-
nal Equipment needs to transmit a Positive-Polarity pulse onto the line via TTIP_n
and TRing_n output pins.
L5
TCK
I JTAG Test Clock input, Boundary Scan Clock input:
NOTE: This input pin should be pulled "Low" for normal operation. internally pulled
"High" with a 50kresistor.
H4
TDI
I JTAG Test Data input, Boundary Scan Test Data Input:
NOTE: This input pin should be pulled "Low" for normal operation. internally pulled
"High" with a 50kresistor.
L4
TDO
O JTAG Test Data output:
Boundary Scan Test Data Output:
H5
TMS
I JTAG Test Mode Select, Boundary Scan Test Mode Select input pin:
P4
TRST
I JTAG Test Mode Reset, Boundary Scan Mode Reset Input pin:
NOTE: This input pin should be pulled "Low" for normal operation. internally pulled
"High" with a 50kresistor.
H17 FACTORY
T13 TEST PINS
U13
FACTORY TEST PINS:
The customer must tie these pins to ground for normal operation.
E10
AGND
E12
AGND
T10
AGND
T12
AGND
L16
AGND
- Analog Ground - Receivers
8

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