XRT91L31 查看數據表（PDF） - Exar Corporation

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XRT91L31

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

Exar Corporation 

XRT91L31

REV. 1.0.2

STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER

TABLE 15: ALTERNATE TRANSMIT PARALLEL DATA INPUT TIMING (STS-3/STM-1 OPERATION). ....................................................... 27

................................................................................................................................................................... 27

3.5 TRANSMIT PARALLEL INPUT TO SERIAL OUTPUT (PISO) ...................................................................... 27

FIGURE 15. SIMPLIFIED BLOCK DIAGRAM OF PISO ......................................................................................................................... 27

3.6 CLOCK MULTIPLIER UNIT (CMU) AND RE-TIMER ..................................................................................... 28

TABLE 16: CLOCK MULTIPLIER UNIT REQUIREMENTS FOR REFERENCE CLOCK .................................................................................. 28

3.7 LOOP TIMING AND CLOCK CONTROL ....................................................................................................... 29

TABLE 17: LOOP TIMING AND CLOCK RECOVERY CONFIGURATIONS ................................................................................................. 29

FIGURE 16. LOOP TIMING MODE USING INTERNAL CDR OR AN EXTERNAL RECOVERED CLOCK ....................................................... 30

3.8 TRANSMIT SERIAL OUTPUT CONTROL ..................................................................................................... 30

FIGURE 17. TRANSMIT SERIAL OUTPUT INTERFACE BLOCK .............................................................................................................. 30

4.0 DIAGNOSTIC FEATURES ................................................................................................................... 31

4.1 SERIAL REMOTE LOOPBACK ..................................................................................................................... 31

FIGURE 18. SERIAL REMOTE LOOPBACK......................................................................................................................................... 31

4.2 DIGITAL LOCAL LOOPBACK ....................................................................................................................... 31

FIGURE 19. DIGITAL LOCAL LOOPBACK........................................................................................................................................... 31

4.3 ANALOG LOCAL LOOPBACK ...................................................................................................................... 32

FIGURE 20. ANALOG LOCAL LOOPBACK .......................................................................................................................................... 32

4.4 SPLIT LOOPBACK ......................................................................................................................................... 32

FIGURE 21. SPLIT LOOPBACK......................................................................................................................................................... 32

4.5 EYE DIAGRAM ............................................................................................................................................... 33

FIGURE 22. TRANSMIT ELECTRICAL OUTPUT EYE DIAGRAM............................................................................................................. 33

4.6 SONET JITTER REQUIREMENTS ................................................................................................................. 33

4.6.1 JITTER TOLERANCE: ................................................................................................................................................ 33

FIGURE 23. GR-253 JITTER TOLERANCE MASK .............................................................................................................................. 34

TABLE 18: XRT91L31 RECEIVER JITTER TOLERANCE PERFORMANCE............................................................................................. 34

FIGURE 24. JITTER TOLERANCE FOR OC-12 WITH HIGH BANDWIDTH AND LOW BANDWIDTH SETTINGS ............................................ 35

FIGURE 25. JITTER TOLERANCE FOR OC-3 WITH HIGH BANDWIDTH AND LOW BANDWIDTH SETTINGS .............................................. 35

4.6.2 JITTER TRANSFER .................................................................................................................................................... 35

FIGURE 26. JITTER TRANSFER FOR OC-12 .................................................................................................................................... 36

FIGURE 27. JITTER TRANSFER FOR OC-3 ...................................................................................................................................... 36

4.6.3 JITTER GENERATION................................................................................................................................................ 36

TABLE 19: XRT91L31 OPTICAL JITTER GENERATION USING 223-1 PRBS PATTERN ........................................................................ 37

TABLE 20: XRT91L31 OPTICAL JITTER GENERATION USING 223-1 PRBS PATTERN USING ALTERNATE STANDARD FILTERS............. 37

5.0 ELECTRICAL CHARACTERISTICS ................................................................................................... 37

ABSOLUTE MAXIMUM RATINGS .................................................................................................................. 37

ABSOLUTE MAXIMUM POWER AND INPUT/OUTPUT RATINGS ......................................................... 37

POWER AND CURRENT DC ELECTRICAL CHARACTERISTICS.................................................................... 38

................................................................................................................................................................... 38

LVPECL AND LVTTL LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS...................................... 39

FIGURE 28. DIFFERENTIAL VOLTAGE SWING DEFINITIONS (INPUT OR OUTPUT) FOR CLOCK AND DATA................................................. 40

ORDERING INFORMATION .................................................................................................................. 40

PACKAGE DIMENSIONS ................................................................................................ 40

FIGURE 29. PACKAGE DIMENSIONS ................................................................................................................................................ 40

REVISION HISTORY ...................................................................................................................................... 41

TABLE 21: .................................................................................................................................................................................... 41

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