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XRT91L34IV-F 查看數據表(PDF) - Exar Corporation

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XRT91L34IV-F Datasheet PDF : 38 Pages
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REV. 1.0.1
NAME
CDRREFSEL
XRT91L34
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
LEVEL
LVTTL,
LVCMOS
TYPE
I
PIN
DESCRIPTION
119 Clock and Data Recovery Unit Reference Frequency Select
Selects the Clock and Data Recovery Unit reference frequency
on REFCLKP/N pins or TTLREFCLK pin based on the table
below.
"Low" = 77.76 MHz reference clock
"High" = 19.44 MHz reference clock
CDRREFSEL
0
1
REFCLKP/N OR
TTLREFCLK
FREQUENCY
77.76 MHz
19.44 MHz
CHANNEL 0 - 3
AVAILABLE DATA RATES
STS-12/STM-4 622.08 Mbps
STS-3/STM-1 155.52 Mbps
STS-1/STM-0 51.84 Mbps
OUTCFG
LVTTL,
I
LVCMOS
CDRDIS0
LVTTL,
I
CDRDIS1
LVCMOS
CDRDIS2
CDRDIS3
NOTE: REFCLKP/N or TTLREFCLK input should be generated
from a crystal oscillator which has a frequency
accuracy better than 100ppm in order for the received
data rate frequency to have the necessary accuracy
required for SONET systems.
NOTE: This pin has no function in Host Mode.
This pin is provided with an internal pull-down.
44 Output Configuration
Globally selects recovered clock and data outputs to be LVDS
or Differential LVPECL on all four channels based on table
below.
"Low" = LVDS Standard Output
"High" = Differential LVPECL Standard Output
OUTCFG
0
1
Input
Configuration
LVDS/
Differential LVPECL
LVDS/
Differential LVPECL
Output
Configuration
LVDS
Differential LVPECL
This pin is provided with an internal pull-down.
107 Clock and Data Recovery Unit Disable
106 Active "High." Disables internal Clock and Data Recovery unit
56 for respective channel. This enables lower power operation
55
when channel is unused.
"Low" = Internal CDR unit is Enabled
"High" = Internal CDR unit is Disabled
NOTE: These pins have no function in Host Mode.
These pins are provided with internal pull-down.
7

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