WM8146 查看數據表（PDF） - Wolfson Microelectronics plc
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WM8146 Datasheet PDF : 17 Pages
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WM8146
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OEB
OP[7:0]
tPZE
Hi-Z
tPEZ
Hi-Z
Figure 3 Output Data Enable Timing
Test Conditions
AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 12MHz unless otherwise stated
PARAMETER
Output propagation delay
Output enable time
Output disable time
SYMBOL
tPD
tPZE
tPEZ
TEST CONDITIONS
IOH = 1mA, IOL = 1mA
MIN
TYP
MAX
75
50
25
UNITS
ns
ns
ns
SERIAL INTERFACE
SCK
SDI
tSPER
tSSU
tSH
SEN
tSCKL tSCKH
tSCE
tSEW tSEC
Figure 4 Serial Interface Timing
Test Conditions
AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 12MHz unless otherwise stated
PARAMETER
SCK period
SYMBOL
tSPER
TEST CONDITIONS
SCK high
tSCKH
SCK low
tSCKL
SDI set-up time
tSSU
SDI hold time
tSH
SCK to SEN set-up time
tSCE
SEN to SCK set-up time
tSEC
SEN pulse width
tSEW
Note: Parameters are measured at 50% of the rising/falling edge.
MIN
83.3
37.5
37.5
10
10
20
20
50
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
WOLFSON MICROELECTRONICS LTD
PP Rev 1.1 January 2000
6
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