Z801806FSC 查看數據表（PDF） - Zilog

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Z801806FSC

Microprocessor Unit

Zilog 

Z80180

Microprocessor Unit

27

Table 8. Z80180-8 AC Characteristics (continued)

No Symbol Item

58 tSRSI CSIO Receive Data Set-up Time (Internal Clock

Operation)

59 tSRHI CSIO Receive Data Hold Time (Internal Clock

Operation)

60 tSRSE CSIO Receive Data Set-up Time (External Clock

Operation)

61 tSRHE CSIO Receive Data Hold Time (External Clock

Operation)

62 tRES

63 tREH

64 tOSC

65 tEXr

66 tEXf

67 tRr

68 tRf

69 tIr

70 tIf

RESET Set-up Time to Ø Fall

RESET Hold Time from Ø Fall

Oscillator Stabilization Time

External Clock Rise Time (EXTAL)

External Clock Fall Time (EXTAL)

RESET Rise Time

RESET Fall Time

Input Rise Time (except EXTAL, RESET)

Input Fall Time (except EXTAL, RESET)

Z80180-8

Min Max Unit

1

–

tcyc

1

–

tcyc

1

–

tcyc

1

–

tcyc

100 –

ns

70 –

ns

–

20 ns

–

25 ns

–

25 ns

–

50 ns

–

50 ns

–

100 ns

–

100 ns

Table 9. Z80180-10 AC Characteristics

No Symbol Item

1 tcyc

Clock Cycle Time

2 tCHW Clock H Pulse Width

3 tCLW Clock L Pulse Width

4 tcf

Clock Fall Time

5 tcr

Clock Rise Time

6 tAD

ØRise to Address Valid Delay

7 tAS

Address Valid to MREQ Fall or IORQ Fall)

Z80180-10

Min Max Unit

100 2000 ns

40 –

ns

40 –

ns

–

10 ns

–

10 ns

–

70 ns

10 –

ns

PS014004-1106

Architecture

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