Z80189 查看數據表（PDF） - Zilog
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Z80189 Datasheet PDF : 107 Pages
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Zilog
PRELIMINARY
16550 MIMIC TIMING (Continued)
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
Table 8. Interrupt Timing Transmitter FIFO Table
No Sym Parameter
Z8L189-20 MHz
Min
Max
Z80189-33 MHz
Min
Max
16
tHR
Delay from /WR
2.5
2.5
(WR THR) to Reset
Interrupt
17 TSTI Delay from Stop to
2
2
Interrupt (THRE)
Units
phi cycles
phi cycles
18 TIR
Delay from /RD to
2.5
Reset Interrupt
2.5
phi cycles
Table 9. I/O Port Timing Table
No Sym
Parameter
Z8L189-20 MHz
Min
Max
1 TsPIA(WR) Data Setup Time to (Port) WR Fall 20
2 TdWR(PIA) Data Valid Delay from WR Rise
60
Z80189-33 MHz
Min
Max
20
60
Units
ns
ns
/WR
Port
1
2
Port (Output)
1
2
1
2
Port Output Data 1 (Out)
Port Output Data 2 (Out)
Figure 27. I/O Port Timing Diagram
24
DS971890301
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