Test Diagrams
VON
nBn
V IN
GND
nA
Select
ION
GND
RON = VON / ION VSel= 0 or Vcc
Figure 7. On Resistance
NC
IA(OFF)
A
V IN
Select
GND
VSel= 0 orVcc
**Each switch port is tested separately.
Figure 8. Off Leakage
NC
IA(ON)
A
V IN
Select
GND
VSel = 0 or Vcc
Figure 9. On Leakage
nBn
V IN
GND RS
nA
CL
RL VOUT
GND
V Sel
GND
RL and CL are functions of the application
environment (see AC/DC tables).
CL includes test ficutre and stray capacitance.
Figure 10. Test Circuit Load
tRISE= 2.5ns
tFALL = 2.5ns
VCC
Input - VSel
GND
10%
90%
VCC /2
90%
VCC /2
VOH
Output - VOUT
90%
VOL
tON
tOFF
10%
90%
Figure 11. Turn-On / Turn-Off Waveforms
© 2007 Fairchild Semiconductor Corporation
FSA2269 / FSA2269TS • Rev. 1.1.5
8
www.f airchildsemi.com