STM6503SFABDG6F 查看數據表（PDF） - STMicroelectronics

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STM6503SFABDG6F

Dual push-button Smart Reset™ with user-adjustable setup delays

STMicroelectronics 

Description

STM6502, STM6503, STM6504, STM6505

1.2

1.2.1

1.2.2

1.2.3

1.2.4

Pin descriptions

Power supply (VCC)

This pin is used to provide the power to the device and to monitor the power supply.

A 0.1 µF decoupling ceramic capacitor is recommended to be connected between the VCC

and VSS pins.

Ground (VSS)

This is the supply ground for the device.

Primary Smart Reset input (SR0)

The primary push-button Smart Reset input, active-low pin is connected to the first push-

button switch.

Secondary Smart Reset input (SR1)

The secondary push-button Smart Reset input, active-low pin is connected to the second

push-button switch. Keeping both Smart Reset inputs SR0 and SR1 active for longer than

tSRC activates the reset output pulse.

Figure 7. STM6502, STM6503 timing

tSRC

tREC

SR0

SR1

RST

AM00327

Reset is asserted “low” right after the Smart Reset setup delay (tSRC) has been met and

returns to high after the tREC period.

10/29

Doc ID 16101 Rev 6

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