STM6503SFABDG6F 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

生产厂家

STM6503SFABDG6F

Dual push-button Smart Reset™ with user-adjustable setup delays

STMicroelectronics 

STM6502, STM6503, STM6504, STM6505

1

Description

Description

STM6502 has two combined Smart Reset inputs (SR0 and SR1) with delayed Smart Reset

setup time (tSRC) programmed by an external capacitor on the SRC pin.

STM6503 is similar to STM6502, has two combined delayed Smart Reset inputs (SR0, SR1)

and three user-selectable delayed Smart Reset setup time (tSRC) options of 2 s, 6 s and 10

s through a three-state TSR input pin: when connected to ground, tSRC = 2 s; when left

open, tSRC = 6 s; when connected to VCC, tSRC = 10 s (all the times are minimum).

STM6504 has two independent Smart Reset inputs. SR0 provides the delayed Smart Reset

setup time (tSRC) function with three user-selectable tSRC options through a three-state TSR

input pin: when connected to ground, tSRC = 2 s; when left open, tSRC = 6 s; when

connected to VCC, tSRC = 10 s (all the times are minimum). SRE provides instant reset. SRE

is edge-triggered with a special debounce time (tDEBOUNCE = 240 ms min.) at the falling

edge after a valid reset period.

STM6505 has two combined delayed Smart Reset inputs (SR0, SR1) and provides an

adjustable reset delay setup time via an external capacitor connected to the SRC pin.

The RST output depends also on the VCC monitoring threshold. STM6505 also provides

independent low battery detect (BLD) output controlled by the secondary external input

voltage VBAT. VBAT is monitored for low voltage and provides an indication on the battery low

detect output pin (BLD). VBAT threshold is 1.25 V, fixed, and an external resistor divider is to

be used to set the actual battery voltage threshold. VBAT threshold hysteresis is 8 mV typ.

(16 mV max.). VBAT is voltage monitoring input only, the device is powered only from the

VCC pin; VCC must be ≥ 1.575 V for proper operation of the VBAT comparator.

1.1

Smart Reset devices

The Smart Reset device family STM65xx provides a useful feature that ensures inadvertent

short reset push-button closures do not cause system resets. This is done by implementing

extended Smart Reset input delay (tSRC). Once the valid Smart Reset input levels and setup

delay are met, the device generates an output reset pulse with user-programmable timeout

period (tREC).

The Smart Reset inputs can be also connected to the applications interrupt to allow the

control of both the interrupt pin and the hard reset functions. If the push-buttons are closed

for a short time, the processor is only interrupted. If the system still does not respond

properly, holding the push-buttons for the extended setup time (tSRC) causes hard reset of

the processor through the reset outputs. The Smart Reset feature helps significantly

increase system stability.

The STM65xx family of Smart Reset devices consists of low current microprocessor reset

circuits targeted at applications such as MP3 players, navigation, smartphones or mobile

phones; generally any application that requires delayed reset push-button(s) response for

improved system stability. The STM65xx devices feature single or dual Smart Reset inputs

(SR). The delayed Smart Reset setup time (tSRC) options of 2 s, 6 s and 10 s (all min.) are

adjustable by an external capacitor on the SRC pin or selectable by three-state logic. The

delayed setup period ignores switch closures shorter than tSRC, thus preventing unwanted

resets.

Doc ID 16101 Rev 6

5/29

Share Link: