STM6503SFABDG6F 查看數據表（PDF） - STMicroelectronics

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STM6503SFABDG6F

Dual push-button Smart Reset™ with user-adjustable setup delays

STMicroelectronics 

Description

STM6502, STM6503, STM6504, STM6505

The STM65xx devices have active-low (optionally active-high) open-drain reset (RST)

output(s) with or without internal pull-up resistor or push-pull as output options, with factory-

programmed or capacitor-adjustable or push-buttons defined output reset pulse duration,

with or without power-on reset function.

Some devices also have an undervoltage monitoring feature: the reset output is also

asserted when the monitored supply voltage VCC drops below the specified threshold. The

reset output remains asserted for the reset timeout period (tREC) after the monitored supply

voltage goes above the specified threshold.

Figure 1. Logic diagrams

VCC

VCC

SR0

SR1 STM6502

RST

SRC

SR0

SR1

STM6503

RST

TSR

VSS

VCC

VSS

VCC

SR0

SRE STM6504

RST

TSR

VSS

Figure 2. Pin connections

RST 1

8 VCC

VSS 2 STM 7 SR0

SR1 3 6502 6 SRC

NC 4

5 NC

SR0

SR1

RST

STM6505

SRC

BLD

VBAT

VSS

AM00378

RST 1

VSS 2

SR1 3

NC 4

STM

6503

8 VCC

7 SR0

6 TSR

5 NC

RST 1

8 VCC

VSS 2 STM 7 SR0

SRE 3 6504 6 TSR

NC 4

5 NC

RST 1

VSS 2

SR1 3

BLD 4

8 VCC

STM 7 SR0

6505 6 SRC

5 VBAT

AM00379

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Doc ID 16101 Rev 6

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