STM6503SFAADG6F 查看數據表（PDF） - STMicroelectronics
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STM6503SFAADG6F Datasheet PDF : 29 Pages
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STM6502, STM6503, STM6504, STM6505
Description
Table 2. Signal names
Symbol
Input/
output
Description
RST
BLD
SR0
SR1
SRE
SRC
TSR
VCC
VBAT
VSS
NC
Output Open-drain reset output, active-low.
Output Battery low detect output, active-low, open-drain. STM6505 only.
Input
Input
Input
Primary push-button Smart Reset input. Active-low, with or without internal
65 kΩ pull-up to VCC (product options).
Secondary push-button Smart Reset input - combines with the primary push-
button reset to provide setup delay time before reset. Active-low, with or without
internal 65 kΩ pull-up to VCC (product options).
Secondary push-button Smart Reset input - provides instant Smart Reset. SRE
is edge-triggered with a special debounce time (tDEBOUNCE = 240 ms min.) at
the falling edge after a valid reset period. Active-high, no internal pull-up to VCC.
STM6504 only.
Input
Input
Supply
Input
Smart Reset input delay setup control: connect to an external capacitor to adjust
the delay setup time (tSRC). STM6502 and STM6505 only.
A three-state Smart Reset input delay setup control. When connected to
ground, tSRC = 2 s; when left open, tSRC = 6 s; when connected to VCC,
tSRC = 10 s (all times are minimum). TSR is a DC-type input, intended to be
either permanently grounded, permanently connected to VCC or permanently
left open. If left open, for improved system glitch immunity it is strongly
recommended to connect a 0.1 µF decoupling ceramic capacitor between the
TSR and VSS pins. STM6503 and STM6504 only.
Supply voltage input. Power supply for the device and an input for the monitored
supply voltage. A 0.1 µF decoupling ceramic capacitor is recommended to be
connected between the VCC and VSS pins.
Battery voltage monitoring input. STM6505 only.
Supply Ground
No connect (not bonded); should be connected to VSS.
Doc ID 16101 Rev 6
7/29
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