MC145073DW 查看數據表（PDF） - Motorola => Freescale

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MC145073DW

Dual 16-Bit Stereo Audio Sigma-Delta ADC

Motorola => Freescale 

CLK, CLKI

twch

tclk, tclki

twcl

Figure 6.

twsh

SYNC

tsync

Figure 7.

CLK/1

CLK/2

CLK/3

SCLK

SDO

SYNC

tsclk

twh

tCSC

twl

tCDV

VALID DATA

tCSY

Figure 8. Serial Interface Timing (Master Mode: ISLAV = 0)

CLK/1

CLK/2

CLK/3

SCLK

SDO

tsclkh

tsu, th

tsclkl

tCDV

VALID DATA

SYNC

tsu, th

Figure 9. Serial Interface Timing (Slave Mode: ISLAV = 1)

NOTE: CLK signals shown above represent the external clock at three different frequencies.

MC145073

8

MOTOROLA

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