24AA00 查看數據表（PDF） - Unspecified

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24AA00

128 Bit I2C™ Bus Serial EEPROM

Unspecified 

24AA00/24LC00/24C00

8.0 READ OPERATIONS

Read operations are initiated in the same way as write

operations with the exception that the R/W bit of the

slave address is set to one. There are three basic types

of read operations: current address read, random read,

and sequential read.

8.1 Current Address Read

The 24XX00 contains an address counter that main-

tains the address of the last word accessed, internally

incremented by one. Therefore, if the previous read

access was to address n, the next current address read

operation would access data from address n + 1. Upon

receipt of the slave address with the R/W bit set to one,

the device issues an acknowledge and transmits the

eight-bit data word. The master will not acknowledge

the transfer but does generate a Stop condition and the

device discontinues transmission (Figure 8-1).

8.2 Random Read

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, first the word address must

be set. This is done by sending the word address to the

device as part of a write operation.

After the word address is sent, the master generates a

Start condition following the acknowledge. This termi-

nates the write operation, but not before the internal

address pointer is set. Then the master issues the

control byte again but with the R/W bit set to a one. The

24XX00 will then issue an acknowledge and transmits

the eight bit data word. The master will not acknowl-

edge the transfer but does generate a Stop condition

and the device discontinues transmission (Figure 8-2).

After this command, the internal address counter will

point to the address location following the one that was

just read.

8.3 Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the device transmits the

first data byte, the master issues an acknowledge as

opposed to a Stop condition in a random read. This

directs the device to transmit the next sequentially

addressed 8-bit word (Figure 8-3).

To provide sequential reads the 24XX00 contains an

internal address pointer which is incremented by one at

the completion of each read operation. This address

pointer allows the entire memory contents to be serially

read during one operation.

FIGURE 8-1:

CURRENT ADDRESS READ

BUS ACTIVITY

MASTER

SDA LINE

S

T

A CONTROL

R

BYTE

T

S 1 0 1 0 XXX 1

S

DATA

T

O

P

P

BUS ACTIVITY

X = Don’t Care Bit

A

N

C

O

K

A

C

K

DS21178D-page 8

 2003 Microchip Technology Inc.

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