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MCP6N16-001E/MF 查看數據表(PDF) - Microchip Technology

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MCP6N16-001E/MF
Microchip
Microchip Technology Microchip
MCP6N16-001E/MF Datasheet PDF : 58 Pages
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4.4.7 MINIMUM STABLE GAIN
There are three options for different Minimum Stable
Gains (1, 10 and 100 V/V; see Table 1). The differential
gain (GDM) needs to be greater than or equal to GMIN
in order to maintain stability.
Picking a part with higher GMIN has the advantages of
lower input noise voltage density (eni), lower input
offset voltage (VOS) and increased gain-bandwidth
product (GBWP). The differential input voltage range
(VDML and VDMH) is lower for higher GMIN, but supports
a reasonable output voltage range.
4.4.8 CAPACITIVE LOADS
Driving large capacitive loads can cause stability
problems for voltage amplifiers. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth
reduces. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. Lower gains (GDM) exhibit greater sensitivity
to capacitive loads.
When driving large capacitive loads with these
instrumentation amps (e.g., > 80 pF), a small series
resistor at the output (RISO in Figure 4-11) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
VDD U1
V1
MCP6N16 RISO
VOUT
V2
VFG
RF CL
RG
VREF
FIGURE 4-11:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
Figure 4-12 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL GMIN/GDM), where
GDM is the circuit’s differential gain (1 + RF/RG) and
GMIN is the minimum stable gain.
MCP6N16
2k
1,0010k
100p
1100p
110000p
1,10n00
101,00n00
Normalized Load Capacitance; CL GMIN/GDM (F)
FIGURE 4-12:
Recommended RISO Values
for Capacitive Loads.
After selecting RISO for the circuit, double check the
resulting frequency response peaking and step
response overshoot on the bench. Modify RISO’s value
until the response is reasonable.
4.4.9 GAIN RESISTORS
Figure 4-13 shows a simple gain circuit with the INA’s
input capacitances at the feedback inputs (VREF and
VFG). These capacitances interact with RG and RF to
modify the gain at high frequencies. The equivalent
capacitance acting in parallel to RG is CG = CDM + CCM
plus any board capacitance in parallel to RG. CG will
cause an increase in GDM at high frequencies, which
reduces the phase margin of the feedback loop (i.e.,
reduce the feedback loop’s stability).
VDD
V1
V2
CCM
U1
MCP6N16
VFG
CDM
CCM
VOUT
RF
RG
VREF
FIGURE 4-13:
Simple Gain Circuit with
Parasitic Capacitances.
2014 Microchip Technology Inc.
DS20005318A-page 43

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